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Characterization of Micro-Bumps for 3DIC Wafer Acceptance Tests

The strong market demands to embed different functionalities from various semiconductor processing technologies into a single system continue to drive demands for 3DIC, in particular, shrinking micro-bump sizes to facilitate stacking of multiple dies. Probecards and Single DC probes are unable to address the measurement flexibilities and challenges needed for micro-bump wafer acceptance tests. In this paper, custom DC positioners with theta-X planarizing capability and true Kelvin probes have allowed for successful demonstration of consistent and repeatable test results in fully automatic micro-bump wafer acceptance tests.

Characterization of Micro-Bumps for 3DIC Wafer Acceptance Tests

Created: June 17, 2021 | Updated: June 17, 2021 | Type: pdf | Size: 1.32 MB

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