Enables test of high performance very large I/O Logic device with fine pitch micro-bump
Systems In a Package (SIP) technology is a key enabler to combine high end logic and memory devices for use in computing intensive applications such as Cloud computing and Self-Driving Automobiles. The silicon interposer is a key element in providing an interconnect platform between different device types. The Altius probe card has been designed to meet the challenging needs of testing high end logic and silicon interposer applications. With the skate shaped probe tip, 45 um pitch capability, low path resistance and leakage , the Altius is the choice for the world’s leading test floor manufacturing of the highest performing commercially available logic devices in the market today.
Altius Key Features
- Minimum grid-array pitch of 45 µm
- Ultra-low probe force for direct probing on copper through silicon vias or solder microbumps, ~1 gram per probe at operating overtravel with best-in-class contact resistance stability
- Support for HBM known-good-die or known-good-stack test, >=3 Gbps test speed
- Scalable for multi-site test to increase throughput, X4 capable for HBM
- Configurable with Hybrid MEMS probes for mixed-pitch microbump layout