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The explosion of data generated by internet traffic and a myriad of other sources is demanding faster and faster server processors and artificial intelligence for real-time capability. Wearables, smart phones, and Internet of Things (IOT) are driving the development of small, high performance, long battery life devices. The logic chips used to drive these applications use wire bond, flip-chip, and wafer-level packaging in smaller and smaller form factors. Growing use of semiconductors in automobiles drives an increased need for reliability, safety, and higher, wider temperature operating ranges compared to other devices. Many of these device applications include semiconductor logic or CPUs integrated into systems on a chip (SoC) to carry out their unique functions.

Semiconductor manufacturers are on a relentless drive to reduce the total cost of test. To eliminate wasted cost to package defective devices, device manufacturers test functionality and performance of each die at the wafer level – also called ‘sort test’. A major contributor to reducing cost of test is to increase the number of die tested in parallel. For flip-chip and wire bond applications, increasing the active area must also meet the requirements of electrical performance and very fine pitch. These factors, along with other considerations, increase the probe card design complexity exponentially.

Vertical probe card solutions must evolve to meet these new testing challenges both at architectural and probe level. Probe card architectures need to be managed for thermal mechanical stresses and support electrical performance requirements to meet device test requirements and achieve increased spring count requirements.

Testing Advanced Packages

As companies explore advanced packaging techniques, their search leads them to seek out cost effective testing solutions to move to high volume production. Advanced packages combine different device types, both memory and logic to create high-performance end products. The unique strategies manufacturers have developed to create these advanced packages, require new probe card technologies that match their requirements.

One challenge is the ability to test interposers used to interface different types within the same package to the package substrate. The logic layer is fabricated on a separate wafer with microbumps and stays intact to form the foundation for stacking. Once the stacking is complete, the post-stack wafer can be tested by probing the microbumps of the assembled stack on the exposed side of the logic die.

The challenges of this multi-stage wafer testing are compounded by the very dense arrangement of microbumps that form the TSV interconnects between the various layers in the stack. Nearly 4000 microbumps are clustered into tightly packed arrays that form the data paths, power supplies and ground. Most have a diameter of just 25μm and a pitch of 45μm, which demands a high precision probing solution, both mechanically and electrically.


At FormFactor, we offer smart test options to achieve the optimal balance between the test cost and test content. For full test coverage KGD test flow, our Altius™ probe card supports 45μm grid-array pitch microbump pitch testing and >3Gb/s at-speed verification. Through our ongoing collaborations with IC manufacturers and ATE providers, we’ve moved forward with solutions that keep pace with the rapid progress in advanced packaging. For example, we deploy composite metal MEMS probes, sometimes mix-and-match Hybrid MEMS design, in probe cards to deliver finely tuned pitch, high current carrying capacity, and reduced power impedance.

Al/Cu Pad Probing for Automotive Applications, Microcontrollers, IoT, Mobile and Wearable Devices

Defect levels for automotive IC’s are at least 10X more stringent than those for mobile and consumer applications, demanding parts per billion (ppb) failure rates and mandating zero-defect manufacturing. In addition, the test conditions are more extreme, such as cold temperature (-40ºC) and hot temperature (>=160ºC) requirements. Large temperature ranges combined with large active probing areas presents many unique probing challenges as the industry continues to shrink pad size and pad pitch down to 45 μm.

FormFactor’s new Kepler™ vertical MEMS probe technology offers a thermal mechanically stable platform for wire-bond pad applications. With its unique high-precision/low-force 2D vertical springs, the architecture provides excellent contact and electrical performance on pads, with superior planarity control over a larger active area.

MF60R Probe Options for Pad Probing
FormFactor offers a selection of 2D MEMS springs that supports fine pitch, multi-site pad probing from 130 μm down to 60 μm. Chip manufacturers are able to select a spring specific to their device testing requirements.

The small scrub marks from FormFactor’s MF60R vertical springs minimizes the pad damage area for 60 μm pitch pad applications. These low-force springs are ideal for automotive and other high temperature applications. They are designed for both peripheral and core pad layouts applications.

Kepler enables pad testing on large active areas with high parallelism, small pad size, fine pitch, and a wide temperature range. Additionally, this new architecture incorporates the benefits of MF60R springs, optimal material selection and automated manufacturing processes which provide superior lifetime, stable contact resistance and tighter pin-pad alignment. These capabilities are essential to support the testing requirements for SoC wire bond devices in automotive, high-performance microcontrollers (MCU), driver chips, as well as many other applications. Developed for high probe count multi-DUT testing in high-volume manufacturing environments, Kepler is optimized to help chip suppliers reduce their overall cost of test while maximizing yields.

Bump/Cu Pillar Probing for HPC, Artificial Intelligence, Applications Processors and Server Chips (GPU, CPU)


With its high current carrying capacity of >1.8 A per probe, FormFactor’s Apollo™ vertical probe card is ideal for testing area-array probing applications such as AI, AP and server chips. Leveraging proprietary manufacturing technology, Apollo delivers excellent reliability and quality for multi-DUT testing, and technology scalability to address a broad range of testing requirements.

Apollo is the probe card of choice for baseband and application processors in mobile devices. Valued for its “Right First Time” reliability, Apollo is known for its unique electrical/ mechanical design/modeling capability to ensure optimal yield in multi-site testing environments.

A variety of probe options are available – from traditional Cobra-style wires to fine-pitch vertical MEMS, and space transformer options. Collectively, they are designed to ensure lowest cost of test production configuration for mobile device testing. For Consumer ICs, Apollo is the industry-leading flip-chip bump probing technology for multi-core processors used in high-end game consoles.