Pushing Technology Boundaries Together
FormFactor draws on its deep understanding of semiconductor test and measurement to form highly productive relationships with industry and technology leaders.
By sharing expertise, all participants benefit: customers build better products, instrument makers advance their technology, fab equipment makers improve their process, and we remain at the forefront of wafer probe technology. This broad collaboration advances simultaneously on multiple fronts. Our R&D engineers work through novel challenges presented by our customers as they move into uncharted technological territories. Our field applications teams respond with creativity and resourcefulness. Our leadership reaches out to other organizations in setting standards and policies. In the end, we understand that pushing the boundaries of both digital and analog technology is a team effort, one that requires all of us to unite in a common effort.
Scaling the Heights of 3D Packaging
One prime driver of today’s system integration and scaling is 2.5D/3D chip packaging, which makes maximum use of available real estate by vertically stacking multiple layers of circuitry in a single package. A prime example is high bandwidth memory (HBM), which is rapidly growing to enable next-generation supercomputers, artificial intelligence (AI) and graphics systems.
HBM stacks multiple layers of DRAM die atop each other and uses fine-pitch silicon interposers to interconnect them with a GPU or CPU subsystem. This tight physical proximity on a single substrate maximizes both performance and integration. However, it also creates some advanced testing challenges – where to test to ensure the quality of the final stack at a reasonable cost? The ultimate solution can involve a combination of products to achieve optimal yield while achieving the lowest cost of test. In this case, the solution involved three elements: one type of probe card for massive parallel testing of the DRAM on sacrificial test access pads, and a second type for direct access probing on the singulated die or stack with grid arrays of microbumps of 25μm diameter for full functional test, and a third type to test the quality of silicon interposers to ensure TSV connectivity for critical I/Os. Working with HBM design engineers from the conceptual stage, we are able to anticipate the complex technical and economical requirements posed by this real-world production test challenge.
FormFactor also recently participated in a demonstration project that used our fully automated CM300 probe station fitted with our Pyramid® RBI probe card to probe on 300mm wafers, containing an array of thousands of microbumps at a pitch of 40μm. The results authenticated an accurate, cost-effective solution to the challenge of 3D wafer packaging in the engineering development environment. The relevance of this new tool was underscored by its winning the 2017 National Instruments Engineering Impact Award in Austin, Texas.