Making Accurate and Consistent Wafer Measurements with Next Generation Guarded True-Kelvin MEMS DC Probes

Gate length down-scaling of silicon-based transistor results in very small on-state drain-source resistance, making it challenging for test engineers to perform precise and repeatable wafer measurements. Size reduction of aluminum-capped copper test pads to save on lithography, prototyping and production costs implies that it is very difficult to re-probe the same device with low contact resistance. Novel true-Kelvin MEMS analytical DC probes, new test and modelling strategies are proposed in this work to address these emerging test challenges.