June 2, 2026
The future of semiconductor innovation will depend on much more than shrinking transistors. AI-driven computing, HBM, advanced packaging, chiplets, and silicon photonics are creating entirely new system architectures, and entirely new testing challenges.
Artificial intelligence is accelerating innovation across the semiconductor industry. From AI training clusters and high-performance computing (HPC) systems to advanced packaging and next-generation memory, today’s semiconductor devices are pushing the limits of performance, bandwidth, and integration.
As these technologies advance, the demands placed on semiconductor test are growing just as quickly.
In a recent episode of the Semiconductor Leadership Podcast, FormFactor CEO Mike Slessor shared his perspective on how AI, High Bandwidth Memory (HBM), advanced packaging, and silicon photonics are transforming both the technical and economic realities of semiconductor testing.
Test Is No Longer Just About Finding Defects
For decades, semiconductor testing was often viewed as a quality-control step, a necessary process for identifying defective devices before they reached customers. Today, test has become much more than a final quality check.
As devices become more complex and expensive to manufacture, the insights gained through testing are becoming just as valuable as the manufacturing process itself. The data collected during wafer test helps manufacturers make smarter decisions about yield, performance, and production costs long before devices reach the market.
At the wafer level, individual dies are electrically tested before packaging to identify defects and verify functionality. Catching problems early helps manufacturers improve yield while avoiding the substantial costs associated with packaging and assembly.
For leading-edge devices, test is no longer simply about determining whether a chip passes or fails. It has become a critical tool for understanding device behavior, optimizing manufacturing processes, and ensuring long-term reliability.
Why HBM Raises the Stakes
Few technologies illustrate this shift better than High Bandwidth Memory.
HBM has become essential for AI accelerators and HPC systems because it delivers significantly higher memory bandwidth while reducing power consumption. Achieving this performance requires vertically stacking multiple memory dies and connecting them through advanced packaging technologies.
The challenge is that when multiple dies are stacked together, even a single defect can have expensive consequences. If one die within an HBM stack fails, the entire package may be compromised. As memory stacks continue to grow in complexity, manufacturers face greater pressure to ensure every component entering assembly is fully functional.
This is where Known Good Die (KGD) strategies and wafer-level testing become indispensable.
By validating dies before packaging, manufacturers can:
Verifying these devices also requires a new level of precision, as engineers work with higher speeds, tighter margins, and increasingly demanding performance targets.
The result is a growing need for advanced test and measurement capabilities that can keep pace with the demands of AI-driven computing.
Advanced Packaging Creates New Test Challenges
Advanced packaging and chiplet-based designs are solving important performance challenges, but they’re also making test significantly more complicated.
Rather than building everything onto a single monolithic die, modern systems increasingly combine multiple specialized chips within a single package. This approach offers flexibility and performance advantages while introducing new challenges for validation and characterization.
Engineers now need to understand not only how each die performs individually, but also how they work together once integrated into a single package.
This means test strategies must address:
As more functionality is integrated at the package level, testing becomes deeper, more comprehensive, and more data-intensive.
According to Slessor, this trend is fundamentally changing how the industry thinks about test. Rather than a discrete manufacturing step, test is becoming a continuous source of insight throughout the semiconductor lifecycle.
The Rise of Photonics and Electro-Optical Testing
Another major topic discussed during the podcast was the growing adoption of silicon photonics and co-packaged optics.
As AI infrastructure scales, traditional electrical interconnects are increasingly constrained by bandwidth and power limitations. Optical technologies offer a path forward by enabling faster, more efficient data transfer between processors, memory, and networking devices.
However, introducing optics into semiconductor systems creates entirely new testing requirements. Unlike traditional semiconductor devices, photonic systems must validate both electrical and optical performance simultaneously. This introduces challenges such as:
As photonics moves from research environments into production, manufacturers need test solutions capable of combining optical and electrical measurements within a unified workflow.
Bringing optical and electrical testing together represents a major change in how semiconductor devices are characterized and validated.
Test Is Becoming a Competitive Advantage
What ties AI, HBM, advanced packaging, and photonics together is the growing complexity of the devices being built. Each new technology delivers substantial performance gains, but each also introduces new manufacturing and validation challenges. As a result, test is no longer simply a checkpoint at the end of production.
Companies that can test more effectively gain a meaningful advantage in both manufacturing efficiency and product performance.
The ability to identify issues earlier, optimize yield, reduce costs, and accelerate product qualification is becoming increasingly important as semiconductor innovation continues to accelerate.
For many organizations, advanced test capabilities are now directly tied to business success.
Looking Ahead
The future of semiconductor innovation will depend on much more than shrinking transistors. AI-driven computing, HBM, advanced packaging, chiplets, and silicon photonics are creating entirely new system architectures, and entirely new testing challenges.
As Mike Slessor discusses in the Semiconductor Leadership Podcast, the industry’s ability to manage this growing complexity will play a major role in determining future success.
Companies that invest in advanced test capabilities today will be better equipped to deliver the performance and reliability that next-generation AI, HPC, and networking systems require.
As these technologies continue to evolve, semiconductor test will play an increasingly important role in enabling the breakthroughs that define the next era of computing.