Advanced Temperature Control for Semiconductor Wafer Test: On-Demand Workshop
August 26, 2021
In Markus Kindler’s on-demand workshop from MEPTEC on advanced temperature control for semiconductor wafer test – he explores active thermal control and thermal chuck systems. He’ll dive into the industry challenges and share three application examples.
Electrical test conditions are getting more and more extreme. Full wafer testing of DRAM, as example, are generating 2000 watts and more. AI chips, as well as the trend of increasing DPW for memory chips, are driving the heat generation inside the test cell higher, resulting in burned probes and inaccurate test results. These conditions are others are making it more difficult to control the chuck and device temperatures. Today, advanced temperature control solutions require low thermal resistance, active temperature control, and high cooling capacity.
Today’s thermal chuck systems have a number of requirements:
- Power dissipation – ranging from 300 Watts to 2000 Watts
- Voltage up to 12KV (low current), and Current up to 300A (low voltage)
- Electrical leakage/noise – <100fA (10V) and <10nA (3KV)
- Temperature control that factors in accuracy, stability, and uniformity
- Mechanical requirements like flatness/planarity (<10µm range)
- High rigidity for 550 kgf load, thin wafer (50µm), warped substrates
In Markus Kindler’s on-demand workshop from MEPTEC – Too Hot to Test – he explores active thermal control and thermal chuck systems. He’ll dive into the industry challenges and share three application examples.
- Full wafer contact (DRAM, Flash, and High Bandwidth Memory testing)
- Microcontroller as typically used in the automotive industry
- Single (small) graphic devices – GPU and 5G