With the emergence of innovative semiconductor technologies, such as the integration of multiple dies into monolithic systems, meeting the rising demand for cost-effective performance in high-end applications has become increasingly challenging. Moore’s Law alone no longer ensures price/performance improvements, necessitating new solutions.

One promising solution is advanced packaging technologies, which offer scaling and performance enhancements independent of on-chip feature size. Advanced packaging is taking the lead as front-end-driven Moore’s Law slows down, shifting the focus from front-end processes to back-end techniques. Where lithography and etching were once the primary enablers, assembly and testing have now gained greater importance. Probing, in particular, is becoming increasingly valuable to the industry, reflected by the rising investments in this area, outpacing historical trends.

However, significant challenges arise with the need for increased test coverage and complexity. Greater coverage demands more probe cards, which affect the composite yields of component dies. Increased complexity necessitates more advanced probe cards with higher densities and faster speeds. To develop viable solutions, technical compromises at the system level are likely required. This necessitates collaboration among multiple suppliers and customers to make informed decisions and compromises intelligently.

Join us in this video – the first in a Mission Central video series – as we delve into the significance of testing thousands of chiplets used in CPUs, GPUs, HBM, I/O, and interposers on a single wafer. FormFactor’s CEO, Mike Slessor, explains how the company is addressing these challenges with innovative testing solutions.