COMPASS 2023, FormFactor’s test and measurement community event, has been announced. It’s being held November 13th – November 21st, and will be virtual in Europe (11/14), the US (11/16), and Asia (11/21). There will also be three in-person Watch Parties:

  • COMPASS EU – Munich, co-located with Semicon Europa (November 14th)
  • COMPASS US – San Jose, CA Demo Center (November 16th)
  • COMPASS Singapore (November 21st)

The COMPASS agenda has been set and here’s a preview of the presentations you’ll see:

Keynote – Advanced Packaging: Enabling Moore’s Law’s Next Frontier

The use of chiplet architectures plays a pivotal role in sustaining the economic growth of power-efficient computing. Therefore, the significance of advanced packaging technologies and architectures aligned with the next frontier of Moore’s Law is exceptionally high.

Pyramid Probe: RF Calibration and Probe Aging Considerations in HVM High Speed IO Devices

The expansion of AI, exemplified by systems like ChatGPT and BING AI, demands substantial investments in the expansion of data centers. This, in turn, propels the demand for increasingly higher data rates in IO (Input/Output) devices. To attain these elevated data rates, wafer testing is advancing to bandwidths exceeding 60 GHz. Pyramid Probes have emerged as a prevalent choice for wafer testing, extending up to 81 GHz and proving valuable in high-volume manufacturing (HVM).

How FormFactor’s Known Good Die Test Enables Advanced Packaging for High Bandwidth Memory – Solutions and Latest Trends

The demand for high-bandwidth computing has spurred the evolution of 3D heterogeneous modules. These vertically stacked memory packages, designed for High Bandwidth Memory, offer numerous advantages over conventional modules, including reduced power consumption, notably increased memory capacity, enhanced performance, all within increasingly compact form factors.

Pharos Vertical and Edge Coupling Low Loss SiPh Wafer Test with Fully Automated Calibration – From Probe Install to Successful V-groove Wafer Level Test in 90 Minutes

In this talk we will discuss FormFactor’s industry leading silicon photonics coupling technology, Pharos, for edge coupling in V grooves and lowest loss coupling on grating couplers. Further we will cover the new four mouse-click automated calibration routine released in the latest silicon photonics software solution suite.

Measuring Superconducting Material Properties for Cryogenic Chip Development

Numerous advancements in Quantum and High-Performance Computing sectors hinge on the utilization of superconducting materials and their distinctive traits. Key components like SNSPDs and SQUIDs rely on widely-used superconductors such as Nb and Al, which boast convenient transition temperatures of approximately 10K and 1K, respectively. Ongoing research focuses on the development of novel superconductors with superior performance and manufacturability. This presentation will delve into the standard measurement techniques and optimal approaches for characterizing the transition temperature of superconducting materials.

Maximizing CCC in a Probe Card and the March to an Unburnable Probe

In this presentation, we will explore multiple techniques that can be employed within the probe card to enhance Current-Carrying Capacity (CCC) and achieve an effective CCC exceeding 2.5A in a probe card with an 80μm minimum pitch. This discussion encompasses innovative probe enhancements as well as structural optimizations aimed at preserving probe integrity within a demanding, high-current environment.

Achieving Traceable RFCMOS Ft and Fmax Wafer Measurements

The research presented here delves into the effects of RF probe contact resistance on the test pads of calibration standards and devices, and its impact on the Ft and Fmax measurements of RFCMOS transistors. The findings reveal that inadequate probe contact on calibration standards results in the extraction of substantial load standard inductance when employing eLRRM calibration, consequently diminishing the transistor’s Fmax. This presentation introduces a novel RF wafer testing approach, aimed at assisting device and test engineers in achieving precise, consistent, and traceable Ft and Fmax measurements.

Simplifying Photonic Test and Measurement at Cryogenic Temperatures

In this presentation, we will delve into FormFactor’s photonics application layer, featuring an automated fiber array scanning and alignment function designed to enhance the efficiency of testing in cryogenic conditions. This innovative technology has been integrated with a state-of-the-art cooling system to facilitate automated testing and measurements within a sub-2K environment. We will showcase the photonics application layer as it pertains to our latest solution, the IQ2000 rapid chip-scale tester, and share our preliminary findings.

Next Generation DC Probes for Accurate and Repeatable Device Modeling Measurements

In this talk, we introduce the next generation advanced guarded DC probes with small probe scrubs, low leakage performance and true Kelvin force sense probe tips to address the test challenges of making precise and consistent device modelling wafer measurements.

For times and the speakers for these presentations, please visit the COMPASS site for details.